A digital-to-analog converter (DAC) is a device for converting a digital signal to an analog signal. A delta-sigma modulation used in DAC applications is a method for encoding high-resolution signals into lower resolution signals using pulse-density modulation. Integrated circuits which implements this technique can relatively easily achieve very high resolutions while using low-cost CMOS processes, such as the processes used to produce digital integrated circuits.
However, a conventional delta-sigma DAC using single-stage noise-shaping loop modulators requires high over-sampling ratios (OSR) to achieve a high resolution, thus consumes more power. (Over-sampling is used to reduce the noise in the frequency band of interest.) Also, single stage modulators encounter difficulty in attempting to use a high-resolution truncation DAC due to high number of conversion elements and dynamic element matching (DEM) hardware required. (DEM is a technique used in integrated circuits design to compensate for components mismatch.) Further, single-stage higher-order modulators are prone to suffer from instability, requires complex single-stage topologies, and consume large area in integrated circuits for multi-bit quantization.
On the other hand, a conventional delta-sigma DAC using cascaded modulators can consume large area in integrated circuits. For example, an exemplary DAC using a correction path requires analog differentiators for noise cancellation, and implementation of differentiators in analog domain is a complex and power-consuming task.
Accordingly, new methods for a delta-sigma DAC are desired.